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2006, 1

Bibhuti Bikramaditya, Ohyun Kwon, Sateesh Kumar Talapuri Venkata Sai, Benjamin Ryu, Joonki Paik

Reconfigurable VLSI architecture design for real time image stabilization

language: English

received 14.09.2005, published 09.01.2006

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ABSTRACT

This paper proposes reconfigurable VLSI (Very Large Scale Integration) architecture design of real time image stabilization to remove the unwanted displacement due to camera motion and the displacement of the target. This is based on image preprocessing, based many steps (namely light compensation, thresholding, scaling and offset, histogram equalization, LUT operator), followed by sub image phase correlation for motion estimation and kalman filtering for motion correction and stabilization. For the implementation into VLSI, FPGA (Field Programmable Gate Arrays) board consisting 3x2 array of vertex 2 as processing element (PEs) is interfaced with PCI port of the PC and the camcorder is connected to USB port of the FPGA board for capturing, visualization and testing of the image if any.
Image preprocessing techniques are applied on input image before actual processing to suppress the unwanted distortion or to enhance some image features, which is important for further processing. Global motion is estimated from the local motion vector (LMV) and the average of two maximum peak amplitudes from the block of LMV decides its global motion vector, thereby accumulating motion vector for panning. The kalman filtering based motion correction system stabilizes image caused by unwanted movement or camera vibration. This proposed system design is expected to achieve a target frame rate of 30 fps, integration time 3.33 ms per frame producing 7.5 mbps image data when pixel is converted to 8 bit digital value for 320x240 QVGA input image.
The proposed design algorithms has been implemented and verified with Frame grabber board (Matrox Meteor-II Mil-lite software) that is interfaced with camcorder and PC. Similarly, the same design has also been tested using ARM Emulator and DM320 Board (ARM9TDMI core, DSP core).

15 pages, 9 figures

Сitation: Bibhuti Bikramaditya, Ohyun Kwon, Sateesh Kumar Talapuri Venkata Sai, Benjamin Ryu, Joonki Paik. Reconfigurable VLSI architecture design for real time image stabilization. Electronic Journal “Technical Acoustics”, http://www.ejta.org, 2006, 1.

REFERENCES

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[5] H. Foroosh, J. B. Zerubia, M. Berthod. Extension of phase correlation to subpixel registration. IEEE Trans. Image Processing, vol. 11, pp. 188-200, 2002.
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[7] Thomas H. Drayer, Josheph G. Tront, Tichard W. Conners, Philip A. Araman. A Development system for Real Time Image Vision Hardware Using Field Programmable Gate Arrays. In a proceedings of the 32-nd Hawaii International Conference on System Sciences. 1999.
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[9] Pedro Cobos Arribus, Felix Monasterio and Huelin Macia. FPGA Board for real time vision development systems.
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Bibhuti Bikramaditya Bibhuti Bikramaditya – R&D Engineer (ASIC) at ITMagic Co. Ltd. (http://www.itmagic.co.kr/), 4rd,WonWooBldg, 907-16, Daechi-dong, Gangnum-gu, Seoul, South Korea

e-mail: bikramadityabibhuti(at)yahoo.com,
bbikramaditya(at)itmagic.co.kr

URL: http://www.bibhutibikramaditya.com

 
 

Ohyun Kwon – MS student, Image Processing and Intelligent Systems Laboratory, Department of Image Engineering, Graduate School of Advanced Imaging Science, Multimedia and Film, Chung–Aung University (http://ipis.cau.ac.kr), 221 Huksuk-Dong, Tongjak-Ku, Seoul 156-756,
S. Korea

e-mail: kohnann(at)hotmail.com

 
 

Sateesh Kumar Talapuri Venkata Sai Sateesh Kumar Talapuri Venkata Sai – project manager of Multimedia Team at ITMagic Co. Ltd. (http://www.itmagic.co.kr/), 4rd,WonWooBldg, 907-16, Daechi-dong, Gangnum-gu, Seoul, South Korea.

e-mail: satish_tvs(at)itmagic.co.kr

 
 

Benjamin Ryu – Technical Director at ITMagic Co. Ltd. (http://www.itmagic.co.kr/), 4rd,WonWooBldg, 907-16, Daechi-dong, Gangnum-gu, Seoul, South Korea.

e-mail: ben(at)itmagic.co.kr

 
 

Joonki Paik – Dean and Professor at Chung–Aung University (http://ipis.cau.ac.kr), 221 Huksuk-Dong, Tongjak-Ku, Seoul 156-756, S. Korea

e-mail: joonkipaik(at)hotmail.com